1. Field of the Invention
The invention relates to the packaging of electronic devices, and more particularly to determination of reliability degradation.
2. Background
Advances in semiconductor manufacturing technology have led to the integration of millions of circuit elements, such as transistors, on a single integrated circuit (IC). As a direct result of incorporating more circuit elements on ICs, the level of functionality of these ICs has increased dramatically. Consequently, there has been a greater need for input/output (I/O) terminals with which to communicate with the additional circuitry on complex logic devices such as, for example, microprocessors.
I/O terminals were traditionally formed by way of metal pads along the periphery of an IC. These pads were then electrically connected to conductive pathways on a package by wires. Such wires, typically made of gold, have been referred to as bond wires, and the process of connecting the pads to the package has been referred to as wire bonding.
For many years wire bonding the pads, which were formed along the periphery of an IC, to connection points on a package was adequate to service the required number of I/O terminals. However, as the number of required I/O terminals reached into the hundreds, a form of I/O connection that allowed substantially the whole surface of an IC, and not only the periphery, to be available for I/O connections became popular. This form of I/O connection is known in the industry as controlled collapse chip connection, or C4. The expression xe2x80x9cflip chipxe2x80x9d has also been used to refer to the C4 I/O connection structures and methods.
Integrated circuits having a controlled collapse chip connection I/O configuration typically have hundreds of terminals, often referred to as bumps, or solder bumps, that are formed on the surface of the IC. The solder bumps are coupled to conductive material in the IC so that signals can be communicated between the IC and components that are external to the IC. The conductive material is generally a metal, such as aluminum or copper, and this metal is further interconnected with other metal lines or interconnect structures of the IC. After the bumps are formed on the IC, they are mated to corresponding connection points in a package. Subsequently, a material, such as an epoxy, is used to fill the gaps between the bumps to complete the assembly process.
The package and the integrated circuit tend expand at different rates when heated. This mismatch introduces mechanical stresses that can result in failure of the solder bumps of the integrated circuit. Both cracking and delamination are known reliability problems. These problems occur more frequently when the differences in thermal expansion rates are larger rather than smaller. For example, the difference in thermal expansion rates between integrated circuits formed in silicon substrates and mated to ceramic packages is less than the difference between those ICs that are mated to organic land grid array packages.
Similarly, integrated circuit packages, such as ball grid array (BGA) packages, are attached to substrates, such as printed circuit boards, by solder balls. These solder balls, essentially larger versions of the solder bumps that are used to attach the integrated circuit die to the package, suffer from the same type of mechanical stresses that are encountered by the solder bumps, and hence are subject to similar failure mechanisms.
What is needed are methods and apparatus for non-destructively determining if the reliability of a solder connection has been degraded.
Briefly, a circuit that senses changes in the electrical characteristics of one or more solder joints, and generates one or more signals based, at least in part, on the electrical characteristics that are sensed, is incorporated into an integrated circuit.
In a further aspect of the present invention, the one or more signals generated by the circuit are indicative of the reliability of solder joints.